EIA, JESD 点击相关标准下载
22a103c.pdf (76.7 KB)
sstl_2spec.pdf (97 KB)
JESD97.pdf (63.94 KB)
abbr_eb3c9f41eab71690e92cef086a61d86c.pdf (152.63 KB)
jesd51-12 Guidelines for Reporting and Using Electronic Package Thermal Information.pdf (190.41 KB)
jesd51-11 Test Boards for Through-Hole Area Array Leaded Package Thermal Measurements.pdf (211.93 KB)
jesd51-10 Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements.pdf (102.64 KB)
jesd51-9 Test Boards for Area Array Surface Mount Package Thermal Measurements.pdf (213.09 KB)
abbr_698bfa1525dfc74b4b9f3a2dc9ceec65.pdf (74.49 KB)
abbr_991d964f20028de29f697a26aec2b2d5.pdf (308.68 KB)
abbr_996ca6923d1d3dff4d0d6e8d2e04b3c4.pdf (472.3 KB)
abbr_f81abeec82de93f0a89d388ff6824dea.pdf (56.35 KB)
jesd51-4 Thermal Test Chip Guideline (Wire Bond Type Chip).pdf (314.07 KB)
abbr_dbe44708c2422e07ebe3dbc7108a88ae.pdf (334.67 KB)
abbr_db278ccd2732c30eb9c833dc242062fd.pdf (66.74 KB)
jesd46b.pdf (27.25 KB)
JESD15 THERMAL MODELING OVERVIEW .pdf (106.47 KB)
JESD15-4 DELPHI Compact Thermal Model Guideline.pdf (503.87 KB)
JESD15-3 Two-Resistor Compact Thermal Model Guideline.pdf (660.16 KB)
jesd15-1 Compact Thermal Model Overview.pdf (116.52 KB)
jesd2 DIGITAL BIPOLAR LOGIC PINOUTS FOR CHIP CARRIERS.pdf (151.96 KB)
jesd1LEADLESS CHIP CARRIER PINOUTS STANDARDIZED FOR LINEARS.pdf (223.44 KB)
abbr_47362fabf27c981377a1f2ab0b801c62.pdf (90.96 KB)
jep138 User Guidelines for IR Thermal Imaging Determination of Die Temperature.pdf (54.08 KB)
jep120a.pdf (307.39 KB)
MO-255A.pdf (479.27 KB)
DGuide4-19B.pdf (189.06 KB)
DGuide4-20A.pdf (232.74 KB)
JESD75-5.pdf (160.22 KB)
MO-220I.pdf (563.63 KB)
MO-241B.pdf (70.92 KB)
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